Yameen, Mohammad and Srivastava, Sanjay K. and Singh, Prashant and Turan, Kamini and Prathap, P. and -, Vandana and Rauthan, C. M. S. and Singh, P. K. (2015) Low temperature fabrication of PEDOT:PSS/micro-textured silicon-based heterojunction solar cells. Journal of Materials Science, 50 (24). 8046-8056 . ISSN 0022-2461

[img] PDF - Published Version
Restricted to Registered users only

Download (2078Kb) | Request a copy

Abstract

Organic/inorganic heterojunctions provide a viable option to replace the conventional high-temperature dopant diffusion-based p-n junction owing to their low manufacturing cost. Thus, there has been increasing interests in low temperature heterojunction solar cell concepts particularly polymer/silicon-based heterojunction solar cells. Here, we report fabrication of heterojunction silicon solar cells employing a relatively rapid and solution-based low temperature (100 A degrees C) process wherein heterojunctions are made by directly spin coating the poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS), a p-layer on the micro-textured (A mu T) n-Si substrates. The micro-texturing enhances the surface area as well as reduces reflectance to 11 % in the spectral range useful for Si solar cell. The role of dimethyl sulfoxide (DMSO) addition in PEDOT:PSS on the performance parameters of the solar cells has been investigated. The PEDOT:PSS layer also acts as a surface passivation layer for n-Si as confirmed by the minority carrier lifetime measurements. Almost threefold enhancement in the photocurrent density (J (sc)) and a fivefold improvement in the conversion efficiency (eta) for an optimized DMSO addition in the polymer have been observed compared to that having no DMSO addition. As a result, a maximum eta of 6.45 % and J (sc) of 27.28 mA/cm(2) have been achieved under 100 mW/cm(2) irradiation at 25 A degrees C. In these cells, open circuit voltage and fill factor are found low, which is the reason for low device efficiency. However, there is a scope for further improvement in device performance by process optimization particularly metal electrodes, PEDOT:PSS/DMSO layer thickness, PEDOT:PSS/DMSO/A mu T-Si interface properties, and incorporation of back surface field to exploit the full potential of such concepts.

Item Type: Article
Subjects: Materials Science
Divisions: UNSPECIFIED
Depositing User: Dr. Rajpal Walke
Date Deposited: 28 Sep 2016 08:25
Last Modified: 28 Sep 2016 08:25
URI: http://npl.csircentral.net/id/eprint/1884

Actions (login required)

View Item View Item